structural Architecture Reference

Components
test_bench_driver_color	<Entity test_bench_driver_color>
hsv2rgb	<Entity hsv2rgb>
	input image wordsize in bits

Signals
clk	std_logic := ' 0 '
	enables block
rst	std_logic := ' 0 '
enable	std_logic := ' 0 '
h_count	std_logic_vector ( ( integer ( ceil ( log2 ( real ( image_width ) ) ) ) - 1 ) downto 0 ) := ( others = > ' 0 ' )
v_count	std_logic_vector ( ( integer ( ceil ( log2 ( real ( image_height ) ) ) ) - 1 ) downto 0 ) := ( others = > ' 0 ' )
red_pixel_from_file	std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )
green_pixel_from_file	std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )
blue_pixel_from_file	std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )
red_pixel_to_file	std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )
green_pixel_to_file	std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )
blue_pixel_to_file	std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )

Instantiations
tst_driver	test_bench_driver_color <Entity test_bench_driver_color>
device_under_test	hsv2rgb <Entity hsv2rgb>

Member Data Documentation

blue_pixel_from_file

blue_pixel_from_file std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )

Signal

blue_pixel_to_file

blue_pixel_to_file std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )

Signal

clk

clk std_logic := ' 0 '

Signal

enables block

device_under_test

device_under_test hsv2rgb

Instantiation

enable

enable std_logic := ' 0 '

Signal

green_pixel_from_file

green_pixel_from_file std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )

Signal

green_pixel_to_file

green_pixel_to_file std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )

Signal

h_count

h_count std_logic_vector ( ( integer ( ceil ( log2 ( real ( image_width ) ) ) ) - 1 ) downto 0 ) := ( others = > ' 0 ' )

Signal

hsv2rgb

hsv2rgb

Component

input image wordsize in bits

red_pixel_from_file

red_pixel_from_file std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )

Signal

red_pixel_to_file

red_pixel_to_file std_logic_vector ( ( const_wordsize - 1 ) downto 0 ) := ( others = > ' 0 ' )

Signal

rst

rst std_logic := ' 0 '

Signal

test_bench_driver_color

test_bench_driver_color

Component

tst_driver

tst_driver test_bench_driver_color

Instantiation

v_count

v_count std_logic_vector ( ( integer ( ceil ( log2 ( real ( image_height ) ) ) ) - 1 ) downto 0 ) := ( others = > ' 0 ' )

Signal

---

The documentation for this class was generated from the following file:

• /home/ben/Programming/VHDL/realtimestagram/src/hsv2rgb/tst/hsv2rgb_tb.vhd