behavioural Architecture Reference

Processes
curve_adjustment	( clk , rst )
	clocked process that outputs LUT-value on each rising edge if enable is true

Signals
lut_value_s	std_logic_vector ( ( wordsize - 1 ) downto 0 )

Member Function Documentation

curve_adjustment()

curve_adjustment (   clk ,   rst   )

Process

clocked process that outputs LUT-value on each rising edge if enable is true

Parameters

[in]	clk	clock
[in]	rst	asynchronous reset

Member Data Documentation

lut_value_s

lut_value_s std_logic_vector ( ( wordsize - 1 ) downto 0 )

Signal

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The documentation for this class was generated from the following file:

• /home/ben/Programming/VHDL/realtimestagram/src/lut/src/lookup_table.vhd